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mp6922 dual fast turn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 1 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the mp6922 is a dual fast turn-off intelligent controller to drive two n-ch power mosfets in llc resonant converters for synchronous rectification. the ic regulates the forward voltage drop of the power switch to about 70mv and turns it off before the voltage goes negative. mp6922 has a light-load function to latch-off the gate driver at light load condition, during which only about 600 a quiescent current is consumed. the fast turn-off speed of mp6922 makes both ccm and dcm driving available. an internal reverse current protection (rcp) function ensures safe operation of the mosfets in high frequency ccm condition. mp6922 requires a minimum number of readily available standard external components and is available in soic8e, soic8 or soic14 package. features ? works with both standard and logic level fets ? compatible with energy star, 0.5w standby requirements ? v dd range from 8v to 24v ? fast turn-off total delay of 20ns ? reverse current protection function ? max 300khz switching frequency ? <600ua quiescent current at light load mode ? supports ccm, crcm and dcm operation mode ? available in soic8e, soic8 or soic14 package applications ? ac-dc adapter ? lcd & pdp tv ? telecom smps all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application q1 q2 s 2 s 1 l s c s l m t c in c out vout v d2 v g2 v g1 v s2 v s en pgnd v dd c1 r1 mp 6922 1 2 3 45 6 7 8 v d en signal gnd 1 1 q1 q2 s 2 s 1 l s c s l m t c in c out vout c1 mp6922 en signal nc v s1 en 1 2 3 4 5 69 10 11 12 13 14 rcp 7 8 nc v d1 v g1 v s2 v dd ll v d2 v g2 gnd r1 r3 r pgnd pgnd r2 c2 4 soic8e soic14
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 2 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number package top marking MP6922DN* soic8e mp6922 mp6922ds** soic14 mp6922 mp6922dse*** soic8 mp6922 *for tape & reel, add suffix ?z (e.g. MP6922DN?z); for rohs compliant packaging, add suffix ?lf; (e.g. MP6922DN?lf?z) **for tape & reel, add suffix ?z (e.g. mp6922ds?z); for rohs compliant packaging, add suffix ?lf; (e.g. mp6922ds?lf?z) ***for tape & reel, add suffix ?z (e.g. mp6922dse?z); for rohs compliant packaging, add suffix ?lf; (e.g. mp6922dse?lf?z) package reference top view pgnd en v dd 1 2 3 45 7 8 mp6922 soic-8 6 v d2 v g v v v g 2 d1 ss 1 top view pgnd exposed pad ( soic8 n only ) v d1 en v dd 1 2 3 45 7 8 mp6922 soic-8e 6 v d2 v g v s1 v s2 v g 2 d1 s1 1 top view v s1 en 1 2 3 4 5 69 10 11 12 13 14 rcp 7 8 nc mp6922 soic-14 v d1 v g1 v s2 pgnd v dd ll v d2 v g2 pgnd nc soic8 soic8e soic14 absolute maxi mum ratings (1) v dd to v s1 ,v s2 , v ss ........................-0.3v to +26v pgnd to v s1 ,v s2 , v ss ...................-0.3v to +0.3v v g1 to v s1 , v ss ................................. -0.3v to v dd v g2 to v s2 , v ss ................................. -0.3v to v dd v d1 to v s1 , v ss .............................-0.7v to +180v v d2 to v s2 , v ss .............................-0.7v to +180v ll, en to v s1 ,v s2 , v ss ..................-0.3v to +6.5v maximum operating frequency............ 300 khz continuous power dissipation .. (t a = +25c) (2) soic8e...................................................... 2.5w soic14 ...................................................... 1.5w soic8 ........................................................ 1.4w junction temperature ...............................150 c lead temperature (solder).......................260 c storage temperature .............. -55c to +150 c recommended operation conditions (3) v dd to v s1 ,v s2 , v ss ...............................8v to 24v operating junction temp. (t j ).... -40c to +125c thermal resistance (4) ja jc soic8 .....................................90 ...... 45 ... c/w soic8e ...................................50 ...... 10 ... c/w soic14 ...................................86 ...... 38 ... c/w notes: 1) exceeding these ratings may damage the device. 2) t a =+25 . the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to-ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous powe r dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb. without heatsink.
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 3 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics v dd = 12v, t a = +25 c, unless otherwise noted. parameter symbol conditions min typ max units v dd voltage range 8 24 v rising 5.0 6.0 7.0 v v dd uvlo threshold hysteresis 0.5 1 1.5 v quiescent current i q v d1 -v s1 =-0.5v, v d2 -v s2 =-0.5v 4 6 ma shutdown current v dd =20v, en=0v 600 a light-load mode current 600 a thermal shutdown 150 o c thermal shutdown hysteresis 30 o c rising 1.1 1.5 1.9 v enable shutdown threshold hysteresis 0.2 0.4 v rising 2.5 3 3.5 v enable uvlo threshold hysteresis 0.2 v internal pull-up current on en 10 15 a control circuitry section v s1,2 ?v d1,2 forward voltage v fwd 55 70 85 mv t don c load = 5nf 150 ns turn-on delay t don c load = 10nf 250 ns input bias current on v d1,2 pin v d1,2 = 180v 1 a minimum on-time t min c load = 5nf 1 s minimum off-time t off 1.6 s light-load-enter delay t ll-delay r ll =100k ? 120 150 s light-load-enter pulse width t ll r ll =100k ? 2.2 s light-load turn on pulse width hysteresis t ll-h r ll =100k ? 0.2 s light-load-enter off period width t ll-off r ll =100k ? 50 s light-load mode exit pulse width threshold (v d1,2 -v s1,2 ) v ll-ds -400 -250 mv light-load mode enter pulse width threshold (v g1,2 -v s1,2 ) v ll-gs 1.0 v reverse current protection threshold v rcp 3 v reverse current protection latch time t rcp 100 s gate driver section v g1,2 (low) i load =1ma 0.05 0.1 v v dd >16v 14 v v g1,2 (high) v dd <16v v dd -2.2 turn off threshold (v s1,2 -v d1,2 ) 0 mv turn-off propagation delay v d1,2 =v ss 15 ns v d1,2 =v ss , c load =5nf, r gate =0 ? 35 ns turn-off total delay t doff t doff v d1,2 =v ss , c load =10nf, r gate =0 ? 45 ns pull down impedance 1 2 ? pull down current 3v mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 4 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions pin # (soic8) pin # (soic8e) pin # (soic14) name description 1 1 2 v g2 fet 2 gate driver output 3 2 3 en enable pin. when en pin voltage is la rger than en shutdown threshold, the internal logic of the ic is star t but the gate driver will be latched until the en pin voltage has exceed the en uvlo threshold 4 3 6 v d2 fet 2 drain voltage sense - 4 7 v s2 source pin used as reference for v d2 - 5 8 v s1 source pin used as reference for v d1 6 6 9 v d1 fet 1 drain voltage sense 7 7 12 v dd supply voltage 8 8 13 v g1 fet 1 gate driver output 2 expose d pad 1,14 pgnd power ground, return for power switch - - 5,10 nc no connection - - 4 ll light load timing setting. connect a resistor to set the light load timing - - 11 rcp reverse protection function, internal 5v reference. 5 - - v ss common source pin used as reference for both channels
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 5 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics v dd = 12v, unless otherwise noted. vdd uvlo rising vs. temperature quiescent current vs. temperature vfwd vs. temperature shutdown current (vdd=20v) vs. temperature v d1,2 breakdown voltage vs. temperature 225 230 235 240 245 250 255 260 265 -50 -30 -10 10 30 50 70 90 110130150 breakdown voltage ( v) 5.7 5.75 5.8 5.85 5.9 5.95 6 6.05 6.1 6.15 -50 -30 -10 10 30 50 70 90110130150 vdd uvlo rising( v) 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 -50 -30 -10 10 30 50 70 90 110130150 quiescent current (ma) 370 380 390 400 410 420 430 440 450 -50 -30 -10 10 30 50 70 90110 130150 -50 -30 -10 10 30 50 70 90110130150 vfwd (mv) 68 68.5 69 69.5 70 70.5 71 71.5 72
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 6 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) v dd = 12v, unless otherwise noted. operation in 180w llc converter v in =220vac, v out =12v, i out =15a operation in 180w llc converter v in =240vac, v out =12v, i out =15a v ds1 20v/div. v gs1 5v/div. v ds2 20v/div. v gs2 5v/div. v ds1 20v/div. v gs1 5v/div. v ds2 20v/div. v gs2 5v/div. v ds1 20v/div. v gs1 5v/div. v ds2 20v/div. v gs2 5v/div. operation in 180w llc converter v in =260vac, v out =12v, i out =15a
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 7 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. block diagram v dd en v d1 v s1 v d2 v g1 v g2 pgnd v s2 rcp ll figure 1?functional block diagram operation the mp6922 supports operation in dcm, ccm and crcm condition. operating in either a dcm or crcm condition, the control circuitry controls the gate in forward mode and will turn the gate off when the mosfet current is fairly low. in ccm operation, the control circuitry turns off the gate when very fast transients occur. blanking the control circuitry contains blanking function. when it pulls the mosfet on/off, it makes sure that the on/off state at least lasts for some time. the turn on blanking time is ~1us, which determines the minimum on-time. during the turn on blanking period, the turn off threshold is not totally blanked, but changed to ~+50mv (instead of 0mv). this assures that the part can always be turned off even during the turn on blanking period. (albeit slower, so it is not recommended to set the synchronous period less than 1 s at ccm condition in llc converter, otherwise shoot through may occur) vd clamp because v d1,2 can go as high as 180v, a high- voltage jfet is used at the input. to avoid excessive currents when vg goes below -0.7v, a small resistor is recommended between v d1,2 pin and the drain of the external mosfet. under-voltage lockout (uvlo) when v dd is below uvlo threshold, the part falls into sleep mode and vg is pulled down by a 10k resistor. enable pin if en is pulled low, the part is in sleep mode. thermal shutdown if the junction temperature of the ic exceeds 150 o c, vg will be pulled low and the part
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 8 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. stops switching. the part will return to normal operation after the junction temperature has dropped to 120 o c. turn-on phase when the switch current flows through the body diode of the mosfet, there will be a negative v ds (v d -v ss ) across it (<-500mv), the v ds is much lower than the turn on threshold of the control circuitry (-70mv), which then turns on the mosfet after 200ns turn-on delay (defined in fig.2). as soon as the turn on threshold (-70mv) is triggered, a blanking time (minimum on-time: ~1us) will be added during which the turn off threshold will be changed from 0mv to +50mv. this blanking time can help to avoid error trigger on turn off threshold caused by the turn on ringing of the synchronous power switch. v ds v gate t don t doff -70mv 2v 0mv figure 2?turn on and turn off delay conducting phase when the mosfet is turned on, v ds (-i sd x r ds(on) ) becomes to rise according to the drop of the switch current (i sd ) , as soon as v ds rises above the turn on threshold (-70mv), the control circuitry stops pulling up the gate driver and the driver voltage of the mosfet dropped, which makes the on resistance r ds(on) of the mosfet becomes larger. by doing that, v ds (-i sd x r ds(on) ) is adjusted to be around -70mv even when the switch current i sd is fairly small, this function can make the turn off threshold (0mv) of the internal driver never triggered until the current through the mosfet has dropped to near zero. turn-off phase when v ds rises to trigger the turn off threshold (0mv), the driver voltage of the switch is pulled to low after about 20ns turn off delay (defined in fig.4) by the control circuitry. similar with turn-on phase, a 1.6us blanking time is added after the switch is turned off, during which the mosfet is never turned on to avoid error trigger. fig.3 show the mp6922 operation at heavy load condition. due to the high current, the driver voltage will be saturated at first. after v ds goes to above -70mv, driver voltage decreases to adjust the v ds to typical -70mv. fig.4 show the mp6922 operation at light load condition. due to the low current, the driver voltage never saturates but begins to decrease as soon as the synchronous power switch is turned on and adjust the v ds . -70mv 0mv vds vgs isd figure 3?synchronous rectification operation at heavy load -70mv 0mv vds vgs isd figure 4 ? synchronous rectification operation at light load
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 9 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. light-load latch-off function the gate driver of mp6922 is latched to save the driver loss at light-load condition to improve light load efficiency. latch off during normal operation when the mosfet conducting period during each switching cycle keeps lower than 2.2us (t ll ), the mp6922 falls into light-load mode and latches off the mosfet after 120us delay (light-load- enter delay, t ll-delay ) after falling into light-load mode, mp6922 monitors the mosfet?s body diode conducting period by sensing v ds (when v ds exceeds - 250mv (v ll-ds ), mp6922 considers the mosfet?s body diode conducting period finishes). if the mosfet?s body diode conducting period is longer than ~2.4us (t ll +t ll- h ), the light-load mode is finished and the mosfet is unlatched to restart the synchronous rectification. for soic14 package mp6922 with ll pin, the t ll could be adjusted by an external resistor: ll ll r t2.2s 100k =? latch off during burst operation the ic also monitors the synchronous mosfet off period, if the off period is longer than the light- load-enter off period width (t ll-off ), mp6922 enters light-load mode and latches off the gate driver. the gate driver is unlatched when the drain- source voltage of the synchronous mosfet v ds drops below -70mv. reverse current protection function when the llc system operates in ccm with very high frequency, the synchronous current may get reverse before the ic turns off the gate driver which leads to shoot through (in center-tapped output with full-wave rectification topology). mp6922 has protection function to latch off the gate driver when the current reverses before the driver signal is pulled low. when the synchronous current reverses, the high spike can be observed between drain-source of mosfet. the mp6922 monitors the voltage by rcp pin through a voltage divider. when the voltage of rcp pin exceeds v rcp , mp6922 will latch the driver signal of both channels for ~100us (t rcp ) to protect the synchronous mosfet. at the end of t rcp , mp6922 restarts the synchronous rectification.
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 10 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical application circuit agnd agnd agnd pgnd pgnd agnd ag n d agnd 5 4 l1 agnd 3 2 4 1 6 7 8 5 t1 n et00039 cs vcc vcc bu rs t cs cs 6 ct 3 bo 7 la tc h 8 fset 4 bu r s t 5 ss 1 tim er 2 lg 11 sw 14 gnd 10 n.c. 13 vcc 12 bs t 16 hg 15 pfc 9 u1 hr1000 vd 2 3 vd1 6 vs2 4 en 2 vs 1 5 vdd 7 vg 2 1 vg1 8 u2 mp 6922dn nc 5 vd2 6 pgnd 1 vg2 2 nc 10 rcp 11 vd 1 9 pgnd 14 vg 1 13 en 3 vs2 7 vs1 8 vdd 12 ll 4 u3 mp6922ds pgnd pgnd pgnd vg 1 vg2 vg1 vg2 pgnd vd1 vd2 vs1 vs2 vs2 vg1 vg2 vs1 vd1 burst pgnd vd2 10 r23 0 r4 2.21k r2 820k r3 9.53k r1 3.57k r5 1m r6 10k r7 1m r8 10 r10 10 r9 10k r1 2 10k r11 1 r14 1 r1 5 1 r13 1k r16 51 r17 1k r21 1k r22 10k r25 10k r27 10 r28 10 r26 10 r24 10k r19 2k r2 0 100k r18 10k r2 9 137k r30 10k r36 38.3k r35 3.3k r3 1 1k r34 1.8k r33 40.2k r3 2 1 2 cn1 1 2 cn2 ss-5-1a 2 1 f1 3 4 2 1 cr1 1uf c1 0.47uf c2 470pf c3 10nf c4 100n c7 2.2uf c8 1 2 100uf c9 10nf c1 0 33 n f cx1 2.2nf c1 3 2.2nf c14 1nf c1 2 2.2uf c15 470pf c1 9 0.1uf c2 1 22nf c1 6 10uf c1 7 1 2 2200uf c2 0 1 2 2200uf c18 1 2 100uf c5 1 2 100uf c6 1 2 d1 1 2 d2 1 2 d4 1 2 d5 1 2 d6 2 3 1 m2 2 3 1 m1 1 2 4 3 u4 pc817a 1 2 3 u5 1nf c1 1 1 2 d3 4 5, 6, 7, 8 1, 2, 3 m3 4 5, 6 , 7 , 8 1, 2, 3 m4 1nf c22 1n f c23 vg1 vg2 vs1 vs2 vd1 vd2 vdd vdd pgnd vd2 3 vd1 6 4 en 2 vs s 5 vdd 7 vg2 1 vg1 8 u6 mp6922dse pgnd figure 5 ? synchronous rectification in llc with mp6922
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 11 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information soic8e (exposed pad) see detail "a" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) top view front view side view bottom view note: 1) control dimension is in inches . dimension in bracket is in millimeters . 2) package length does not include mold flash , protrusions or gate burrs . 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming ) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ba. 6) drawing is not to scale. 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00) pin 1 id 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 14 85 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o 0.010(0.25) bsc gauge plane
mp6922?dual fast t urn-off intelligent controller mp6922 rev. 1.23 www.monolithicpower.com 12 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. soic14 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150 (3.80) 0.157 (4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.338(8.55) 0.344(8.75) 0.053(1.35) 0.069(1.75) top view front view 0.228 (5.80) 0.244 (6.20) side view 17 14 8 recommended land pattern 0.213 (5.40) 0.063 (1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches . dimension in bracket is in millimeters . 2) package length does not include mold flash , protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming ) shall be 0.004" inches max. 5) drawing conforms to jedec ms -012, variation ab. 6) drawing is not to scale . 0.010(0.25) bsc gauge plane
mp6922?dual fast t urn-off intelligent controller notice: the information in this document is subject to change wi thout notice. users should warrant and guarantee that third party intellectual property rights are not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. mp6922 rev. 1.23 www.monolithicpower.com 13 9/19/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. soic8 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150(3.80) 0.157(4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.189(4.80) 0.197(5.00) 0.053(1.35) 0.069(1.75) top view front view 0.228(5.80) 0.244(6.20) side view 14 85 recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation aa. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane

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